silicon laboratories inc (SLAB) Key Developments
Silicon Labs Introduces the Next-Generation Si4790x Tuner IC Family
Aug 25 14
Silicon Labs introduced the automotive tuner IC family designed to deliver best-in-class AM/FM and HD Radio/DAB/DMB digital radio performance for demanding car radio systems. Silicon Labs' next-generation Si4790x tuner IC family delivers a new benchmark for car radio reception performance while delivering the lowest system cost. The Si4790x family also provides exceptional flexibility and scalability for Tier 1 automotive infotainment suppliers and aftermarket car radio makers worldwide. The Si4790x family leverages Silicon Labs' patented digital low-IF architecture and RF in CMOS technology pioneered more than 12 years ago. Silicon Labs introduced its first single-chip broadcast audio IC products nearly 10 years ago, redefining how AM/FM tuner ICs were designed into analog-intensive consumer electronics products by providing a highly integrated solution that reduced component count by more than 90% and board space by more than 60%. To date, Silicon Labs has shipped more than 1.2 billion 'radio-on-a-chip' ICs, culminating with the introduction of the Si4790x family, the industry's most advanced automotive tuner IC. The superior linearity of the Si4790x tuner's integrated RF front-end, combined with comprehensive AM/FM firmware running on a high-performance on-chip radio DSP, sets a new bar for key automotive radio metrics such as sensitivity in weak signal environments, selectivity in the presence of blockers, and immunity to multipath fading and distortion. Si4790x tuner family supports all worldwide broadcast radio bands including AM/FM, longwave (LW), shortwave (SW), NOAA weather band, FM RDS decoding, and AM/FM HD Radio and DAB reception (Band-III and L-band). Leveraging the Si4790x family, Tier 1 suppliers can make the most of their R&D investment across multiple product segments, from cost-effective single-tuner designs to premium multi-tuner systems, with one modular architecture. All tuner devices in the Si4790x family share the same application programming interface (API) allowing infotainment system developers to reuse the same software across different product lines and market segments. The Si4790x tuners' high level of single-chip integration enables developers to significantly reduce board space, the external bill of materials and overall system cost. The tuners integrate active loop-through buffers for all radio bands, eliminating external active splitters. Integrated active loop-through buffers greatly simplify the front-end RF design, further reducing cost. Samples of Si4790x automotive tuner ICs are available now. To help accelerate development of Si4790x-based systems, the Si4791-3T1A-EVB evaluation kit is available for USD 1,495.
Silicon Labs Introduces the Next-Generation Si534x 'Clock-Tree-on-a-Chip' Portfolio
Jul 30 14
Silicon Labs introduced the industry's most frequency-flexible clock solutions offering jitter performance for high-speed networking, communications and data center equipment serving as the foundation of Internet infrastructure. Silicon Labs' next-generation Si534x 'clock-tree-on-a-chip' portfolio includes high-performance clock generators and highly integrated multi-PLL jitter attenuators. These single-chip, ultra-low-jitter timing devices combine clock synthesis and jitter attenuation functionality to reduce the cost and complexity of optical networking, wireless infrastructure, broadband access/aggregation, Carrier Ethernet, test and measurement, and enterprise/data center equipment including edge routers, switches, storage and servers. Skyrocketing demands for bandwidth and the growing complexity of Internet infrastructure and data center systems are driving the need for a wide variety of clocks at different frequencies, signaling formats and voltage levels. Jitter performance requirements to support the higher data rates for 10/40/100G networks are also very demanding. Given the limited flexibility and integration of traditional clock solutions, hardware designers are often forced to use a costly and complicated combination of clock generators, jitter attenuators, oscillators and buffers to complete their clock trees. To address this industry need, Silicon Labs' new Si534x jitter attenuators and clock generators leverage frequency flexibility and clock-tree-on-a-chip integration to deliver an efficient, cost-effective solution that combines all discrete timing functions into a single-chip clock IC solution. With Silicon Labs' Si534x family and new ClockBuilder Pro software, high-performance clock configuration has never been simpler or faster. ClockBuilder Pro is designed to help system designers quickly and easily create custom Si534x clocks for their applications. This easy-to-use software integrates the equivalent of more than 150 engineer-years of Silicon Labs' DSPLL(R) timing technology and applications expertise to simplify clock tree design and speed time to market. Using the intuitive ClockBuilder Pro GUI, designers can quickly generate sophisticated device configurations in less than five minutes, minimizing software development overhead.
Silicon Laboratories Inc. Presents at 16th Annual Pacific Crest Global Technology Leadership Forum, Aug-12-2014 01:00 PM
Jul 28 14
Silicon Laboratories Inc. Presents at 16th Annual Pacific Crest Global Technology Leadership Forum, Aug-12-2014 01:00 PM. Venue: The Sonnenalp Hotel, 20 Vail Road, Vail, CO 81657, United States.
Silicon Laboratories Inc. Reports Unaudited Consolidated Earnings Results for the Second Quarter and Six Months Ended June 28, 2014; Provides Earnings Outlook for the Third Quarter of 2014
Jul 25 14
Silicon Laboratories Inc. reported unaudited consolidated earnings results for the second quarter and six months ended June 28, 2014. For the quarter, the company's revenues were $154.92 million compared with $141.5 million a year ago. Operating income was $20.80 million compared with $19.0 million a year ago. Income before income taxes was $20.22 million compared with $18.5 million a year ago. Net income was $14.28 million or $0.32 per diluted share compared with $12.6 million or $0.29 per diluted share a year ago. Non-GAAP operating income was $33.49 million. Non-GAAP net income was $25.54 million or $0.58 per diluted share. Even excluding the benefit of the patent sale, non-GAAP EPS was $0.03 favorable to the top end of guidance range, which is a very strong outcome for the second quarter, and primarily due to revenue upside and superior gross margins.
For the six months, the company's revenues were $300.61 million compared with $286.92 million a year ago. Operating income was $30.81 million compared with $39.67 million a year ago. Income before income taxes was $29.80 million compared with $38.5 million a year ago. Net income was $22.39 million or $0.51 per diluted share compared with $32.65 million or $0.76 per diluted share a year ago. Net cash provided by operating activities was $63.42 million compared with $66.1 million a year ago. Purchases of property and equipment were $3.34 million compared with $6.5 million a year ago.
The company expects revenue in the third quarter to be in the range of $153 million to $157 million. Third quarter diluted earnings per share are expected to be between $0.18 and $0.24 on a GAAP basis and between $0.45 and $0.51 on a non-GAAP basis. Non-GAAP gross margin for the third quarter is expected to be 61% to 62%, which includes a 1.5 point lift from the third quarter patent sale transaction, and is in line with gross margin model of 60% to 62%. Non-GAAP operating expense will grow in the third quarter to $67 million to $68 million due to an increase in new product development activity, combined with $3 million in ongoing litigation cost. Non-GAAP effective tax rate should remain stable at around 23%, and expects non-GAAP EPS to be $0.45 to $0.51 per share.
Silicon Laboratories Inc. to Report Q2, 2014 Results on Jul 25, 2014
Jul 14 14
Silicon Laboratories Inc. announced that they will report Q2, 2014 results at 5:00 PM, Eastern Standard Time on Jul 25, 2014