August 21, 2014 4:33 PM ET

Semiconductors and Semiconductor Equipment

Company Overview of Bluespec, Inc.

Company Overview

Bluespec, Inc. synthesizes, models, and test benches with legacy IP to employ emulation earlier for modeling, verification, and early software development. It offers Bluespec Compiler, which compiles a high-level model, transactor, test bench, and implements into Verilog RTL or SystemC; Bluespec Simulator that simulates Bluespec designs; Bluespec Development Workstation, which provides high-level GUI-based development environment for the design, analysis, and debug of Bluespec designs; Emulation App, an application that provides debug, instrumentation, and co-emulation for emulation of synthesizable models and legacy RTL with third-party FPGA boards/emulators; and Semu, a verification and hy...

3 Speen Street

Suite 100

Framingham, MA 01701

United States

Founded in 2003

Phone:

781-250-2200

Fax:

781-684-1199

Key Executives for Bluespec, Inc.

Chief Executive Officer
Chief Strategist
Age: 49
Chief Technical Officer
Executive Vice President of Sales
Age: 67
Vice President of Marketing
Compensation as of Fiscal Year 2014.

Bluespec, Inc. Key Developments

Bluespec Desktop Emulation Now Supports Xilinx 7 Series FPGAs

Bluespec, Inc. announced that its affordable, easy-to-use desktop emulation software, Semu(TM), supports Xilinx 7 series All Programmable FPGAs and the Vivado(R) Design Suite. Support for Xilinx Kintex(R)-7 KC705 and Virtex(R)-7 VC707 Evaluation Kits is available now and support for additional boards and devices will follow. Semu Capabilities Enabled with Xilinx's Latest Silicon and Tools Delivers emulation speeds at simulation prices using the latest Xilinx 7 series FPGAs, which scale across low-cost and ultra high-end. Supports Xilinx Kintex-7 KC705 and Virtex-7 VC707 Evaluation Kits to enable high-speed verification of RTL designs up to 3.5 million gates. Support for larger capacity boards will follow. Works with the Xilinx Vivado Design Suite to provide consistent design-under-test (DUT) integration into FPGA boards. Individual ASIC and FPGA developers, including architects, modelers, designers and even verification engineers, have been limited primarily to simulation and, for the adventurous, home-grown FPGA-based solutions. For these users, Semu brings together the power of FPGAs and C to deliver Desktop Emulation, a high-speed verification and hybrid prototyping solution targeted to their capacity, budget and productivity needs. Key features: High-speed verification and hybrid prototyping solution for Verilog designs in an affordable, desktop form factor. Connect, Build & Go(TM) gets user up and running in less than a day. Build automation connects designs to the host and provides a C API for easy integration of SystemC/C/C++ models and test benches. Dynamic debugging enables iterations in minutes, instead of hours or days, by eliminating the requirement to re-instrument and re-synthesize. Semu provides dynamic visibility and hardware breakpoint capability against the register state in FPGA emulation at any time. KC705 and VC707 support 4.9M and 7.3M raw ASIC gates, respectively (the assumption is 1 Logic Cell = 15 ASIC Gates). Gate count capacities depend on design and utilization. Using a conservative assumption of gate count and utilization, the boards are capable of supporting 2.3M and 3.5M ASIC gates, respectively.

Bluespec, Inc. Introduces High-Speed Verification and Hybrid Prototyping Solution for RTL IP

Bluespec, Inc. announced Semu, a software solution that delivers emulation speeds at simulation prices: affordable, easy-to-use desktop emulation with low-cost Xilinx FPGA-based development cards. Semu speeds up long functional verification runs by up to 10,000X to quickly flush out tough corner cases on complex IP blocks and subsystems using application driven data sets and pseudo-random testing. By easily integrating RTL IP into SystemC/C/C++ Virtual Platforms, Semu also enables cost-effective hybrid prototyping for high-speed, hardware-accurate pre-silicon software development. Desktop Emulation: Traditional emulation, with its large capacities, serves the needs of verification and emulation teams doing full-system validation. Meanwhile, individual ASIC and FPGA developers, including architects, modelers, designers and even verification engineers, have been limited primarily to simulation and, for the adventurous, home-grown FPGA-based solutions. For these users, Semu brings together the power of FPGAs and C to deliver Desktop Emulation, a high-speed verification and hybrid prototyping solution targeted to their capacity, budget and productivity needs. Semu connects to standard, low-cost Xilinx FPGA development boards through a Linux PC to deliver affordable, desktop emulation. With Connect, Build and Go automated setup, users can deploy Semu in hours, not weeks: Imports RTL IP designs, with build automation, into FPGA emulation; generates a host-based C API to easily connect models and test benches to the design-under-test (DUT) - interfaces can be at both signal and transactional (TLM) levels; and connects designs to the host, seamlessly including transactors and PCIe-based co-emulation link. Semu provides dynamic visibility and hardware breakpoint capability against 100% of the register state in a design at any time to give a debug experience that feels more like software than hardware. Dynamic debug eliminates the requirement to frequently re-instrument and re-synthesize, so debug iterations can be performed in minutes, not hours or days. Semu is a software package that runs on a Linux PC and provides an easy-to-use GUI for project configuration, build, run and debug. Semu includes ready-to-use Verification IP (VIP) templates that users can leverage to bring up designs quickly. Semu will initially support Verilog designs up to 2 Million gates when used with a Xilinx ML605 board. Support for additional Xilinx FPGA-based boards will soon provide higher capacities up to 14 Million gates. Semu integrates dynamic debug, design-specific transactors, high-performance co-emulation, and the power of FPGAs all within a simple GUI and C APIs for Verilog designers. Bluespec's synthesizable modeling is the key technology that enables bringing such complex, extremely flexible systems as Semu to market. Furthermore, it enables delivering the rich roadmap of transactors, verification IP, and next generation debug planned for Semu. Semu is available now at pricing that starts at $9,500 for a time-based license and maintenance.

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