Last $32.52 USD
Change Today +0.85 / 2.67%
Volume 6.7M
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altera corp (ALTR) Details

Altera Corp. designs, manufactures, and markets programmable logic devices (plds); structured application-specific integrated circuit devices; predefined design building blocks or intellectual-property cores; and associated development tools. Its programmable logic devices are semiconductor integrated circuits. Altera also provides HardCopy, HardCopy II, and other masked programmed logic devices, configuration devices, development software, and other tools and intellectual-property cores. Altera was founded in 1983 and is headquartered in San Jose, Calif.

3,094 Employees
Last Reported Date: 02/14/14
Founded in 1983

altera corp (ALTR) Top Compensated Officers

Chairman, Chief Executive Officer and Preside...
Total Annual Compensation: $800.0K
Chief Financial Officer, Principal Accounting...
Total Annual Compensation: $420.0K
Senior Vice President and General Manager of ...
Total Annual Compensation: $372.5K
Senior Vice President of Research and Develop...
Total Annual Compensation: $370.8K
Senior Vice President of Worldwide Sales and ...
Total Annual Compensation: $355.2K
Compensation as of Fiscal Year 2013.

altera corp (ALTR) Key Developments

Altera Corporation Expands Automotive-Grade Product Portfolio with Highly Integrated PowerSoC

Altera Corporation announced nine new Altera(R) Enpirion(R) power system-on-chip (PowerSoC) devices that fully comply with the Automotive Electronics Council (AEC-Q100) qualification standard temperature grade 2, a critical stress test qualification for automotive integrated circuits (ICs). The newly qualified Enpirion devices include step-down PowerSoCs from the EP53xx and efficiency-optimized EN63xx families, supporting load currents up to 12 amps. Unlike discrete power products, these turnkey solutions give designers complete power systems that are fully simulated, characterized and production-qualified, streamlining the design-in process and making it much faster. These pre-tested power solutions are ideal for use with Altera's automotive-grade Cyclone(R) FPGAs and SoCs and MAX(R) FPGAs and CPLDs. Altera Enpirion PowerSoCs offer up to 96% peak efficiency and are ideal for the following applications: Infotainment and driver information--Head units, display interfaces, instrument clusters, head-up displays (HUDs), human-machine interface (HMI) technology, and rear-seat entertainment (RSE) systems. ADAS-Forward-looking cameras, surround view systems, radar, light detection and ranging (LIDAR), rear-view cameras, e-mirrors (electronic mirrors) and telematics (V2X) applications. Electric vehicle and powertrain--Engine control unit (ECU), battery management systems, motor control, power conversion (DC/DC, AC/DC) and adaptive suspension.

Altera Corporation and ARM Announce Long-Term Agreement to Expand Their Strategic Partnership for Embedded Software Development Tools for SoC FPGAs

Altera Corporation and ARM announced a long-term agreement to expand their strategic partnership for embedded software development tools for SoC FPGAs. In 2012, Altera and ARM announced the creation of the ARM(R) Development Studio 5 (DS-5(TM)) Altera(R) Edition, which pioneered the invention of FPGA-Adaptive Debugging for SoC FPGAs. Through the expanded agreement announced on Oct. 1, 2014, the ARM DS-5 Altera Edition toolkit is being enlarged to include the following additional tools: ARM Compiler 5 and ARM Compiler 6, providing the only build tool chains specifically designed to optimize software for the Cortex(R)-A9 and Cortex-A53 processors in Altera's SoC portfolio; Debug support for ARM Cortex-A53 quad-core processor in Stratix(R) 10 SoC, including FPGA-Adaptive Debug capabilities for removing the debug barrier between the multi-core subsystem and FPGA fabric. The companies also agreed to a long-term OEM agreement for DS-5 Altera Edition to provide support for all future ARM-based Altera SoC devices, ensuring a consistent, software development platform across Altera's portfolio of SoC FPGAs. ARM Development Studio 5 is ARM's tools solution for embedded software development. ARM DS-5 Altera Edition is a complete tools solution exclusively for Altera SoCs, sold and distributed by Altera, and optimized to remove the debugging barrier between the integrated multi-core CPU subsystem and the FPGA fabric. The new DS-5 Altera Edition provides a substantial productivity gain for product development based on Altera SoC FPGAs. Key features include the following: Debug and trace support for 32-bit dual-core Cortex-A9 CPUs in Cyclone(R) V, Arria(R) V and Arria 10 SoCs and 64-bit quad-core Cortex-A53 in Stratix 10 SoCs; ARM Compiler 5 (ARMv7) and ARM Compiler 6 (ARMv8) tool chains; FPGA-Adaptive Debug support for SoC FPGAs, including software register views of IP programmed into the FPGA and cross-triggering between CPU and FPGA logic domains for hardware/software co-debugging; advanced trace, including time-correlated events in FPGA fabric with software events and processor instruction trace; DS-5 Streamline(TM) performance analyzer for identification and correction of system-level bottlenecks. DS-5 Altera Edition is exclusively available for Altera SoCs. One license is included in every Altera SoC development kit at no extra cost. DS-5 Altera Edition is also included in the Altera SoC Embedded Design Suite, which is available for $995 or as a free 30-day evaluation at The next release of DS-5 Altera Edition, which will add the ARM Compiler 5, is planned for November 2014. Existing customers under valid maintenance can receive the new release at no cost.

Altera Corporation Announces Immediate Availability of Next-Generation, Non-Volatile Max 10 FPGAs and Evaluation Kits

Altera Corporation announced the availability of non-volatile MAX(R) 10 FPGAs, Altera's latest addition to its Generation 10 portfolio. Using TSMC's 55 nm embedded flash process technology, MAX 10 FPGAs revolutionize non-volatile FPGAs by delivering dual-configuration flash, analog and embedded processing capabilities in a small-form-factor, low-cost, instant-on programmable logic device. MAX 10 FPGAs provide greater system value to users by reducing overall bill-of-material costs while increasing board reliability. The highly integrated, non-volatile FPGAs provide up to 50% board area savings compared to other low-cost FPGAs by integrating into a single chip the following key features: Up to 50K logic elements, Flash memory blocks (user flash and dual-configuration flash), Analog-to-digital converters, Embedded memory and DSP blocks, DDR3 external memory interfaces, Embedded processing with soft-core Nios(R) II processors, Up to 500 user I/O and Integrated power regulator. These key features provide higher system-level value to customers by enabling MAX 10 FPGAs to perform several important system functions, such as an instant-on configuration, fail-safe upgrades, system monitoring and system control. Instant-on Architecture for System Bring-up: MAX 10 FPGAs configure in less than 10 ms (milliseconds) using on-die flash memory. For system management applications, instant-on allows MAX 10 FPGAs to be the first usable device on a system board and control the bring-up of other board components. In data path applications, instant-on allows MAX 10 FPGAs to provide responsive user interaction when powered on. Dual Configuration for Fail-safe Upgrades: The on-die flash storage integrated in MAX 10 FPGAs supports dual configuration, allowing two FPGA designs in a single chip. The dual-configuration capability enables the device to perform fail-safe upgrades, whereby one flash block is designated for upgrade images while the other block is reserved for a "safe" factory image. This capability enables deployment of systems more quickly, reduces maintenance cost and provides longer operating life. Analog Blocks for System Monitoring: The analog blocks integrated with MAX 10 FPGAs include ADCs and temperature sensing diodes. The integrated analog functionality allows MAX 10 FPGAs to be used in applications that require system monitoring, such as temperature control and touch-panel human-machine interface control. Integrated analog blocks reduce board complexity, lower latency and deliver more flexible sample-sequencing, including 2-channel simultaneous sampling. Embedded Processing For System Control: MAX 10 FPGAs support the integration of Altera's soft core Nios II embedded processors, providing embedded developers a single-chip, fully configurable, instant-on processor subsystem. Nios II embedded processors integrated in a MAX 10 FPGA allow the device to be used to efficiently manage complex control systems. Targeting a Broad Range of Applications: MAX 10 FPGAs provide system-level value to many end markets. The device's integrated functions combined with small package options (as small as 3 mm x 3 mm) make MAX 10 FPGAs an effective solution for space-constrained systems, such as automotive and industrial applications. In advanced communications, compute and storage applications, MAX 10 FPGAs can efficiently manage complex control functions, while performing system configuration, interface bridging, power sequencing and I/O expansion. Altera's Enpirion(R) Power Solutions Enhance the System Value of MAX 10 FPGAs: The total system value MAX 10 FPGAs offer in the areas of integration and package size are greatly enhanced when used alongside Altera's Enpirion power devices. Enpirion power products are highly integrated solutions that simplify board design and reduce BOM (bill-of-material) costs. Altera provides fully validated Enpirion power reference designs optimized for use with MAX 10 FPGAs, lowering design risk and simplifying board design. MAX 10 FPGAs are available. MAX 10 FPGAs are offered in commercial, industrial and automotive (AEC-Q100) temperature grades. Customers can kick start their MAX 10 project by purchasing evaluation kits, downloading design examples, reading product documentation and downloading free MAX 10 FPGA development software, all available on Altera's website. MAX 10 FPGA evaluation kits are available for as low as $30.


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