NEC selects Altera's 28nm FPGAs
Dec 3 13
Altera Corporation has announced that NEC will use Altera's 28nm FPGAs to enable wireless service providers to manage their networks. Altera Stratix V and Cyclone V FPGAs drive the complex algorithms that allow NEC's LTE base station infrastructure offering to improve operators' data performance while lowering investment and operation cost of the network. Altera's 28 nm portfolio will enable to innovate on base station architecture which operators can use to deliver superior services to users while reducing capital costs and operating costs. Altera's 28 nm FPGAs provide the flexibility and performance needed to implement the various LTE system level features of the next-generation base station without sacrificing power efficiency. LTE enables improved wireless service to users, allowing multitude types of services to be offered, enhancing users' mobile experiences. It also allows operators to utilize bandwidth more effectively because it supports network deployment on different frequency bandwidths.
Altera Corporation Releases Quartus(R) II Software Arria 10 Edition
Dec 2 13
Altera Corporation released the Quartus(R) II software Arria 10 edition, the development tool support for 20 nm FPGAs and SoCs. Based on TSMC 20 nm process technology, Arria(R) 10 FPGAs and SoCs effectively reinvent the midrange FPGA and SoC category by simultaneously delivering a 15% performance gain over current high-end FPGAs and up to 40% lower power than previous midrange devices. Customers can start developing Arria 10 FPGA and SoC-based systems using the familiar and proven Quartus II design environment with the fast compile times in the industry. Customers can use the Quartus II software Arria 10 edition to get a jumpstart designing the device's advanced features into next-generation systems. Users can design, simulate and compile Arria 10 FPGAs and SoCs using the software. The software release includes advanced timing models and final pin outs to enable board layout. The Quartus II software Arria 10 edition supports multiple FPGA and SoC devices, including the large density midrange Arria 10 device, featuring up to 1.15 million logic elements (LEs). Arria 10 FPGAs and SoCs offer 2X greater system integration than competitive midrange devices, including up to 1.15 million LEs, variable-precision digital signal processing (DSP) blocks with more than 3300 18x19 multipliers and integrated hard IP and the option of an integrated processor system that features a 1.5 GHz dual-core ARM(R) Cortex(TM)-A9 processor. Arria 10 FPGAs and SoCs also provide 4X greater bandwidth compared to the current generation, including 28-Gbps transceivers, and 3X higher system performance, including support for PCIe Gen3 x8, 2666 Mbps DDR4 and up to 15-Gbps Hybrid Memory Cube. Arria 10 FPGAs and SoCs devices will be supported by Altera's Enprion optimized power solutions that deliver an combination of high efficiency, small footprint, and low noise performance in an integrated product. Arria 10 FPGAs and SoCs are optimized for systems that require high-performance features while being constrained by strict cost and power budgets. These midrange devices leverage an advanced 20 nm process and include features tailored to address the requirements of a variety of end markets, including communications, broadcast, and compute and storage. Arria 10 FPGAs and SoCs provide customers in the wireless communications market a high-performance, cost-optimized single-chip solution for mobile backhaul applications by integrating the control plane processor, network processor, switches, and IO expansion into a single chip. The devices also include support the latest wireless standards such as CPRI. Customers in the wireline transmission and networking segments will have early access to features like PCIe Gen3 x8, 28-Gbps transceivers, 100G Ethernet and 100G Interlaken, and support for the latest serial memory standards; Arria 10 FPGAs and SoCs provide developers of broadcast and studio equipment the most power-, space-, and cost-efficient solution for integrating video and image processing including 4K, 3D, and codecs. Customers can get started developing next-generation broadcast and studio equipment that supports the latest ultra-high-definition video technologies; the era of cloud computing is straining today's compute and storage systems, which are required to access more data in shorter amounts of time, while minimizing power consumption. Arria 10 FPGAs and SoCs are an ideal solution to target next-generation storage system due to their high-performance features and low power consumption, leading to lower operating expenses for customers. The Quartus II software Arria 10 Edition is available now for download at www.altera.com/quartus-arria10. The software is available as a subscription edition and includes a free 30-day trial. The annual software subscription is $2,995 for a node-locked PC license.
Altera Corporation Expands Intellectual Property Portfolio with Four New IP Cores
Nov 27 13
Altera Corporation has expanded its intellectual property, or IP, portfolio with the addition of four new IP cores to the company's MegaCore IP library. These new best-in-class IP cores include an ultra-high performance and ultra-low latency 100G Interlaken, 100G Ethernet, 40G Ethernet and 10G Ethernet IP. The cores are optimized to deliver the high performance, lowest latency and smallest resource utilization in the industry. Developers of data centers and networking equipment can leverage these versatile solutions to increase system bandwidth while differentiating the end system. The Interlaken and Ethernet IP cores, as well as other standard interface IPs, are currently available and fully supported in the latest release of the Quartus II software v13.1. All IPs included in the MegaCore IP library are validated and demonstrated in silicon. The IP cores deliver 15% timing margin for faster timing closure, which allow customers to quickly integrate multiple IP cores into the designs. The new Interlaken and Ethernet IP cores are optimized for use in the company's high-performance Stratix V FPGAs as well as future Generation 10 FPGAs and SoCs. The new IP cores included in the MegaCore IP library include: Low-Latency 100G Interlaken IP Core; Low-Latency 100G Ethernet IP Core; Low-Latency 40G Ethernet IP Core; and Low-Latency 10G Ethernet IP Core. Low-Latency 100G Interlaken IP Core leverages a soft PCS to deliver roundtrip latency under 200ns. Low-Latency 100G Ethernet IP Core is the smallest 100G Ethernet core at 55% smaller than the existing 100G Ethernet IP and has an roundtrip latency of 160ns, making it 70% lower latency than competitive 100G Ethernet IP cores. Low-Latency 40G Ethernet IP Core is 40% smaller than existing 40G Ethernet IP cores, with 60% lower latency. Low-Latency 10G Ethernet IP Core is 20% smaller than existing 10G Ethernet IP cores, with 24% lower latency.