Cavium and Quortus Enable Unique LTE RAN and EPC on Single Chip for Portable Applications
Jul 21 14
Cavium, Inc. and Quortus announced a partnership to embed Quortus' software Evolved Packet Core (EPC) on Cavium's OCTEON Fusion family of System-on-Chip (SoC) processors for small cell base stations. The combination of Cavium's OCTEON Fusion processors, LTE stack software and low power, low cost eNodeB designs with Quortus' highly efficient, fully featured EPC software turns small cells into extremely-portable, standalone rapidly-deployable mobile networks for site-specific uses such as public safety, emergency services and military applications. This allows the private network to operate without any connection to a remote centralized core enabling new deployment paradigms. The OCTEON Fusion family of SoCs is the industry's most powerful small cell "base station-on-a-chip" product line, providing hardware acceleration specifically designed for LTE and 3G small cells. Cavium's field-proven small cell solutions include complete software implementations (PHY + stack) and manufacturable hardware designs. Quortus' software EPC technology distills the functionality of a core network into an application which can be installed on SoCs, commodity hardware or in the cloud. It not only reduces the cost of network deployments, but brings a level of flexibility that allows core intelligence to be placed where it is needed most, including the network edge. It is deployment-proven in a range of settings including enterprises and remote locations, on both public and private networks. By embedding Quortus' EPC on the OCTEON Fusion processor, the entire functionality of a mobile network can be held on the same chip; this means that a single small cell can become a highly portable mobile network. Furthermore, placing the radio and core layer on the same chip reduces the complexity of interaction between both layers, enabling the implementation of advanced functionality such as meshing, macro mobility and satellite backhaul optimization features in a more efficient way.
Altera and Cavium Deliver Pre-Verified Packet Classification Solution for Networking Appliances
Jun 23 14
Altera Corporation announced its Interlaken Look-Aside intellectual property (IP) core has been tested and is compatible with Cavium's NEURON Search(TM) Processor. This deployment-ready, pre-verified solution provides networking OEMs a low-latency, high-performance packet interface for use in networking appliances, including routers, switches, firewalls, and security storage. The Interlaken Look-Aside IP core is offered as part of Altera's portfolio of IP cores which are optimized to provide superior performance, latency and area utilization when integrated within Altera's Arria(R) 10 and Stratix(R) V FPGAs. Altera's FPGA-based Interlaken Look-Aside solution enables interoperability between a datapath device and a look-aside coprocessor with transfer rates up to 300 Gbps and delivers more than 500 million packets per second performance. In addition to the superior performance, the Interlaken Look-Aside IP is comprised of soft and hardened logic blocks that offer customers a high degree of user interface, lane and data rate configuration flexibility for optimal integration. Altera and Cavium tested and verified the Interlaken Look-Aside solution using a Stratix V FPGA and a NEURON Search Processor. The low-latency packet interface and scalable storage space provides high performance and high capacity for Access Control List (ACL) and packet classification applications. An interoperability report is available from Altera that describes the testing methods and performance metrics achieved using Altera's Interlaken Look-Aside IP core interfacing with Cavium's NEURON Search Processor.
Cavium Unveils New Family of Workload Optimized Processors
Jun 19 14
Cavium, Inc. has unveiled ThunderX, a 64-bit ARMv8 system on chip, or SoC, family of workload optimized processors with a range of SKUs and form factors. The key features include highly optimized full custom processor cores, highly efficient caching subsystem, high memory bandwidth and capacity and end to end system virtualization. They also include high bandwidth customized I/O configurations along with application specific hardware accelerators delivering overall low end to end latency. ThunderX consists of 24 to 48 cores and is the fifth generation of multi-core processor design from Cavium targeting high performance volume servers and appliances for large data centers and cloud infrastructure. This family of processors offers workload optimized SKU's targeted for compute, storage, networking and secure compute segments. This product family is based on highly efficient full custom processor cores designed by Cavium in 28nm process technology under architectural license from ARM. It is fully compliant with ARMv8 architecture as well as ARM's Server Base System Architecture (SBSA) standard while bringing to market dramatic enhancements that include: The first ARM based SoC that scales up to 48 cores with up to 2.5 GHz core frequency with 78K of I-Cache and 32K of D-Cache along with 16MB of L2 cache; The first ARM based SOC to be fully cache coherent across dual sockets using Cavium Coherent Processor Interconnect (CCPI); Integrated I/O capacity with 100s of Gigabits of I/O bandwidth; Four DDR3/4 72 bit memory controllers capable of supporting 2400 MHz memories with 1TB of memory in a dual socket configuration; Hundreds of integrated hardware accelerators for security, storage, networking and virtualization applications; Standard based low latency Ethernet fabric interconnecting thousands of ThunderX nodes in 2D and 3D configurations and enabling fabric monitoring and SLA enforcements with awareness and policy enforcement for virtualized networks; Virtualization everywhere with Cavium virtSOC technology Full system virtualization for low latency from virtual machine to I/O; and Best in class performance per watt and performance per dollar for the target applications. ThunderX workload optimized family of processors include: ThunderX_CP, ThunderX_ST, ThunderX_SC and ThunderX_NT. ThunderX_CP has up to 48 highly efficient cores along with integrated virtSOC, dual socket coherency, multiple 10/40 GbE and high memory bandwidth. This family is optimized for private and public cloud web servers, content delivery, web caching, search and social media workloads. ThunderX_ST has up to 48 highly efficient cores along with integrated virtSOC, multiple SATAv3 controllers, 10/40 GbE & PCIe Gen3 ports, high memory bandwidth, dual socket coherency, and scalable fabric for east-west as well as north-south traffic connectivity. This family includes hardware accelerators for data protection/integrity/security, user to user efficient data movement (RoCE) and compressed storage. This family is optimized for Hadoop, block & object storage, distributed file storage and hot/warm/cold storage type workloads. ThunderX_SC has up to 48 highly efficient cores along with integrated virtSOC, 10/40 GbE connectivity, multiple PCIe Gen3 ports, high memory bandwidth, dual socket coherency, and scalable fabric for east-west as well as north-south traffic connectivity. The hardware accelerators include Cavium's 4th generation NITROX and TurboDPI technology with acceleration for IPSec, SSL, Anti-virus, Anti-malware, firewall and DPI. This family is optimized for Secure Web front-end, security appliances and Cloud RAN type workloads. ThunderX_NT has up to 48 highly efficient cores along with integrated virtSOC, 10/40/100 GbE connectivity, multiple PCIe Gen3 ports, high memory bandwidth, dual socket coherency, and scalable fabric with feature rich capabilities for bandwidth provisioning, QoS, traffic Shaping and tunnel termination. The hardware accelerators include high packet throughput processing, network virtualization and data monitoring. This family is optimized for media servers, scale-out embedded applications and NFV type workloads. The CN87xx consists of 8 to 16 cores in single socket configuration with two DDR3/4 controllers, multiple 10GbE, SATAv3 and PCIe Gen3 interfaces. This family is cost and power optimized for entry level applications such as cold storage, distributed content delivery, dedicated hosting, distributed memory caching and embedded and control plane. The ThunderX family of processors along with a range of hardware reference platforms will be available for general sampling in early fourth quarter of 2014.