cadence design sys inc (CDNS) Snapshot

Cadence Design Systems Inc. announced that PMC(R) has adopted the Cadence(R) Physical Verification System as signoff technology for its global design centers. PMC has used the Physical Verification System for several successful tapeouts, including PMC's DIGI 120, described as the industry's only single-chip processor supporting 10G, 40G and 100G speeds for OTN transport, aggregation and switching. The device, with 200+ million gates and 180+ Mbits of RAM, is the larger production SoC that PMC has delivered.

Cadence Design Systems Inc. introduced the Tempus(TM) Timing Signoff Solution, a new static timing analysis and closure tool designed to enable System-on-Chip (SoC) developers to speed timing closure and move chip designs to fabrication quickly. The Tempus Timing Signoff Solution represents a new approach to timing signoff tools that enables customers to shrink timing signoff closure and analysis for faster tapeout while producing designs with less pessimism, area and power consumption. The new capabilities introduced in the Tempus Timing Signoff Solution include: The first massively distributed parallel timing engine on the market which can scale to utilize up to hundreds of CPUs. Parallel architecture enables the Tempus Timing Signoff Solution to analyze designs in the hundreds of millions of instances without compromising accuracy. A new path-based analysis engine that leverages multi-core processing to reduce pessimism. With its performance advantage, the Tempus Timing Signoff Solution enables broader use of path-based analysis than other solutions. Multi-mode, multi-corner (MMMC) analysis and physically-aware timing closure that leverages multi-threaded and distributed timing analysis. The Tempus Timing Signoff Solution advanced capabilities can handle designs containing hundreds of millions of cell instances without compromising accuracy. Initial engagements with customers have shown that the Tempus Timing Signoff Solution can achieve timing closure in days on a design that would have taken several weeks with traditional flows. The Tempus Timing Signoff Solution is expected to be available in the third quarter of 2013. Cadence plans to showcase the tool's advanced capabilities at DAC, June 3-5, 2013 in Austin, Texas.

Cadence Design Systems Inc. Presents at Barclays Global Technology, Media and Telecommunications Conference, May-23-2013 01:10 PM. Venue: Crowne Plaza Times Square, 1605 Broadway (at 49th Street), New York, New York, United States. Speakers: Geoffrey G. Ribar, Chief Financial Officer, Principal Accounting Officer and Senior Vice President.