Last $38.86 USD
Change Today -0.225 / -0.58%
Volume 308.6K
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As of 5:20 PM 07/23/14 All times are local (Market data is delayed by at least 15 minutes).

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01/21/14 - $41.62
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10/17/13 - $34.55
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synopsys inc (SNPS) Details

Synopsys, Inc. provides electronic design automation (EDA) software products used to design integrated circuits (IC) and electronic systems primarily in the United States, Europe, Japan, and the rest of Asia Pacific. The company’s EDA solutions include Galaxy Design platform that provides integrated chip design solution; Discovery Verification platform, a portfolio of functional, analog/mixed-signal, formal, and low-power verification products; and FPGA design products, which are complex chips that can be customized or programmed to perform a specific functions. It also provides DesignWare intellectual property (IP) solutions that comprise solutions for interfaces, such as USB, PCI Express, DDR, Ethernet, SATA, and HDMI; analog IP for analog-to-digital data conversion, audio, and video; and system-on-chip (SoC) infrastructure IP, including datapath IP, AMBA interconnect fabric and peripherals, and verification IP. In addition, the company offers logic libraries and embedded memories; configurable processor cores for embedded designs; and IP subsystems for audio and sensor functionality. Further, it offers Platform Architect software that enables exploration of SoC architectural trade-offs; SPW and System Studio tools for algorithm design; Processor Designer software for custom processor design; Synphony Model and C Compiler for high-level synthesis; and Virtualizer tool and transaction-level models to create virtual prototypes and fully functional software models of complete systems. Additionally, the company provides HAPS FPGA-based prototyping systems that integrate hardware and software tools with real-world interfaces to enable hardware-software integration and full system validation. It also provides manufacturing solutions that enable semiconductor manufacturers to develop fabrication processes; and consulting and design services for various phases of SoC development process. The company was founded in 1986 and is headquartered in Mountain View, California.

8,573 Employees
Last Reported Date: 12/20/13
Founded in 1986

synopsys inc (SNPS) Top Compensated Officers

Co-Chief Executive Officer, President and Dir...
Total Annual Compensation: $500.0K
Co-Founder, Chairman and Co-Chief Executive O...
Total Annual Compensation: $500.0K
Chief Financial Officer
Total Annual Compensation: $400.0K
Executive Vice President of Worldwide Sales &...
Total Annual Compensation: $480.0K
Compensation as of Fiscal Year 2013.

synopsys inc (SNPS) Key Developments

Emulex Adopts Synopsys Verification IP

Synopsys Inc. announced that Emulex adopted Synopsys Verification IP (VIP) for the Ethernet 1G/10G/40G/100G protocol. Synopsys VIP for 40G/100G Ethernet is based on Synopsys' native SystemVerilog and native UVM architecture, offering ease of use, ease of integration, performance, configurability, coverage, and debug within UVM environments. In addition, Synopsys VIP for Ethernet supports Synopsys' Protocol Analyzer, a protocol-centric debug environment. These capabilities substantially increase user productivity for the challenging and time-consuming task of protocol verification. The Synopsys Verification IP for Ethernet 1G/10G/40G/100G is available. Ethernet VIP and the UNH test suites, in source-code, are available to standalone title owners, as part of the Synopsys VIP Library, and as part of Verification Compiler(TM). Synopsys' DesignWare(R) Ethernet 1G/10G/40G/100G Controllers and Enterprise 10G and 12G PHYs are also available now.

Synopsys Inc. Announces Availability of DesignWare AEON Trim NVM IP for High-Voltage Processes

Synopsys Inc. announced the availability of the DesignWare AEON Trim NVM IP for high-voltage processes. The new IP is up to 75% smaller than alternative NVM IP solutions, helping to reduce the size and cost of automotive ICs. Available in standard 180-nanometer (nm) 5V CMOS and Bipolar CMOS DMOS (BCD) processes without a need for additional masks or process steps, the DesignWare NVM IP supports the wide temperature range required for automotive Grade 0 applications and exceeds AEC-Q100 quality standards. In addition, faster programming times reduce NVM test times by 3X compared to alternative NVM solutions, enabling designers to reduce production test times and minimize test costs for automotive and industrial ICs. With the growth in the automotive IC market, designers need to meet the quality and reliability criteria established for the extreme environment under the hood of a car while respecting the cost and size parameters of even the smallest ICs. With its Grade 0 temperature range and 15+ year data retention capabilities, the DesignWare AEON Trim NVM IP for high-voltage processes enables designers to implement their ICs in applications with harsher and safety-critical environments. The DesignWare AEON Trim NVM IP for high-voltage processes includes special test modes that increase programming speed and reduce test costs and time by up to 3X. DesignWare AEON Trim NVM IP for high-voltage processes is available now in 180--nm 5V CMOS and BCD processes.

Synopsys Inc. Announces Availability of Key Protocol Compliance Test Suites

Synopsys Inc. announced the availability of key protocol compliance test suites. Delivered as SystemVerilog source code to ease integration and enable re-use across multiple projects, the test suites are complete, self-contained and design-proven testbenches that eliminate the task of developing a verification environment and tests for protocol compliance verification. Furthermore, having test suites in source code enables end-users to easily customize or extend compliance verification environments to include unique application-specific or corner-case tests allowing engineering resources to focus more time on their core-competencies and competitive differentiation.


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Price/Sales 3.0x
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Price/Cash Flow 16.7x
TEV/Sales 2.5x

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