Last $51.43 USD
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xilinx inc (XLNX) Details

Xilinx, Inc. designs and develops programmable devices and associated technologies worldwide. The company’s programmable devices comprise integrated circuits (ICs) in the form of programmable logic devices (PLDs), such as programmable System on Chips, and three dimensional ICs; software design tools to program the PLDs; targeted reference designs; printed circuit boards; and intellectual property (IP), which consists of Xilinx and various third-party verification and IP cores. It also offers design services, customer training, field engineering, and technical support. The company offers its products to electronic equipment manufacturers in end markets such as wired and wireless communications, industrial, scientific and medical, aerospace and defense, consumer and automotive, audio, video and broadcast, and data processing. Xilinx, Inc. sells its products through a network of independent distributors; and through direct sales to original equipment manufacturers by a network of independent sales representative firms and by a direct sales management organization. The company was founded in 1984 and is headquartered in San Jose, California.

3,329 Employees
Last Reported Date: 05/23/13
Founded in 1984

xilinx inc (XLNX) Top Compensated Officers

Chief Executive Officer, President and Direct...
Total Annual Compensation: $737.5K
Chief Financial Officer, Principal Accounting...
Total Annual Compensation: $477.5K
Senior Vice President and General Manager of ...
Total Annual Compensation: $455.0K
Senior Vice President of Worldwide Quality & ...
Total Annual Compensation: $365.0K
Senior Vice President of Worldwide Sales
Total Annual Compensation: $381.3K
Compensation as of Fiscal Year 2013.

xilinx inc (XLNX) Key Developments

Xilinx Inc. Announces completion of Agilent N6462A Compliance Test Running for DDR4 Memory Solution

Xilinx Inc. and Agilent Technologies Inc. announced Xilinx's DDR4 memory solution for UltraScale(TM) devices has completed the Agilent N6462A compliance test running at 2,400 Mb/s. As defined by the JEDEC JESD79-4 DDR4 DRAM specification, the Agilent N6462A DDR4 compliance test enables early adopters of DDR4 technology to make critical electrical and timing analysis for characterization and margin testing purposes. The DDR4 memory interface in the Xilinx(R) UltraScale(TM) All Programmable FPGAs provides more than 1 Tb/s of memory bandwidth to handle the massive data flow, fast processing, and enormous memory requirements of leading-edge, next-generation system designs in key applications such as video imaging and processing, traffic management, and high-performance computing. Agilent's DDR4 BGA interposers allow users to gain access to the DDR4 signals that are critical to DDR4 debug and validation. The interposers work in existing designs and eliminate the need for up-front planning or re-design by providing probe points that enable designers to see the actual clock and data signals using an oscilloscope. Availability: UltraScale devices with DDR4 memory interface are available now.

Xilinx Inc. Announces First Solution for 'Softly' Defined Networks

Xilinx Inc. announced the first solution for "Softly" Defined Networks, expanding programmability and intelligence from the control to the data plane. The design of the programmable data plane functions is enabled by the new Software Defined Specification Environment for Networking (SDNet), with functional specifications automatically compiled into Xilinx's All Programmable FPGAs and SoCs. In contrast to traditional SDN architectures, which employ fixed data plane hardware with a narrow southbound API connection to the control plane, Softly Defined Networks are based upon a programmable data plane with content-intelligence and a rich southbound API control plane connection. This enables multiple disruptive capabilities including, support of wire speed services that are independent of protocol complexity; provisioning of per-flow, flexible services; and support for revolutionary in-service "hitless" upgrades while operating at 100% line rate. These unique capabilities enable carriers and MSOs to dynamically provision unique, differentiated services without any interruption to the existing service or the need for hardware requalification or truck roll. This provides service providers higher revenue potential with unprecedented CapEx, OpEx, and time to market savings. Network equipment providers realize similar benefits from the feature rich, flexible Softly Defined Network platform which allows for extensive differentiation through the deployment of content-aware data plane hardware that is programmed with the SDNet environment. Additional benefits of Softly Defined Network solutions enabled by SDNet and Xilinx(R) All Programmable FPGAs and SoCs include, improved, highly flexible Quality of Service (QoS); flow and session aware capabilities; fully programmable hardware data plane and I/O; support for NFV at wire speed including user defined, custom capabilities; and scalable line rates from 1G to 400G.

Xilinx and its Wholly-Owned Subsidiaries, Xilinx Ireland and Xilinx Sales International Enter into Master Distributor Agreement with Avnet

Effective March 12, 2014, Xilinx, Inc., and its wholly-owned subsidiaries, Xilinx Ireland and Xilinx Sales International Pte. Ltd. (collectively, Xilinx"), entered into a Master Distributor Agreement with Avnet, Inc. Pursuant to the agreement, Avnet, directly and through certain of its subsidiaries, will serve as a non-exclusive distributor of Xilinx semiconductor devices and other Xilinx products worldwide. Under the terms of the agreement, Avnet is authorized to pass through the standard Xilinx warranty that applies to Xilinx semiconductor devices and other products to end customers that purchase such devices and products through Avnet or its subsidiaries. The agreement will continue unless terminated by either party upon ninety (90) days written notice. The agreement supersedes and replaces Xilinx's Master Distributor Agreement dated July 27, 2005, as amended, with Avnet, which was terminated by mutual agreement by the parties in connection with the adoption of the Agreement.


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