Last $48.25 USD
Change Today -0.07 / -0.14%
Volume 1.5M
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As of 8:10 PM 07/11/14 All times are local (Market data is delayed by at least 15 minutes).

xilinx inc (XLNX) Snapshot

Open
$48.46
Previous Close
$48.32
Day High
$48.54
Day Low
$48.15
52 Week High
03/21/14 - $55.59
52 Week Low
11/15/13 - $42.84
Market Cap
12.9B
Average Volume 10 Days
2.6M
EPS TTM
$2.23
Shares Outstanding
268.3M
EX-Date
05/12/14
P/E TM
21.6x
Dividend
$1.16
Dividend Yield
2.16%
Current Stock Chart for XILINX INC (XLNX)

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xilinx inc (XLNX) Details

Xilinx, Inc. designs and develops programmable devices and associated technologies worldwide. Its programmable devices comprise integrated circuits (ICs) in the form of programmable logic devices (PLDs), such as programmable system on chips, and three dimensional ICs; software design tools to program the PLDs; targeted reference designs; printed circuit boards; and intellectual property (IP), which consists of Xilinx and various third-party verification and IP cores. The company also offers legacy development boards; development kits, including hardware, design tools, IP, and reference designs that are designed to streamline and accelerate the development of domain-specific and market-specific applications; and configuration products, such as one-time programmable and in-system programmable storage devices to configure Xilinx field programmable gate arrays. In addition, it provides design services, customer training, field engineering, and technical support. The company offers its products to electronic equipment manufacturers in end markets, such as wired and wireless communications, industrial, scientific and medical, aerospace and defense, audio, video and broadcast, consumer, automotive, and data processing. Xilinx, Inc. sells its products through a network of independent distributors; and through direct sales to original equipment manufacturers by a network of independent sales representative firms and by a direct sales management organization. The company was founded in 1984 and is headquartered in San Jose, California.

3,500 Employees
Last Reported Date: 05/16/14
Founded in 1984

xilinx inc (XLNX) Top Compensated Officers

Chief Executive Officer, President and Direct...
Total Annual Compensation: $750.0K
Chief Financial Officer and Executive Vice Pr...
Total Annual Compensation: $480.0K
Executive Vice President and General Manager ...
Total Annual Compensation: $477.5K
Senior Vice President of Worldwide Quality & ...
Total Annual Compensation: $370.0K
Senior Vice President of Worldwide Sales
Total Annual Compensation: $385.0K
Compensation as of Fiscal Year 2014.

xilinx inc (XLNX) Key Developments

NEC's iPASOLINK Millimeter Wave Communication Systems Deploys Xilinx Virtex-7 FPGA Solution

Xilinx Inc. announced that their Virtex(R)-7 FPGA is to be deployed in NEC Corporation's iPASOLINK millimeter wave communications systems. NEC's iPASOLINK series is an ultra-compact system for building wireless backhaul networks in overseas markets. The high-performance, high-density Virtex-7 FPGA contributed to iPASOLINK's enhanced performance and size reduction. NEC also leveraged the JESD204 LogiCORE(TM) IP to facilitate connections with high-speed AD/DA converters, improving data transfer rates and shortening development time of the overall system. NEC's iPASOLINK is small, lightweight, and easy to install, allowing for considerable flexibility of location. Designed to be installed outdoors, the units are waterproof and dustproof and can withstand temperatures ranging from -33 degrees C in winter and 50 degrees C in summer. These attributes contribute to their reliability and make them suitable for use in environmental conditions anywhere in the world.

Xilinx and Pico Computing Announce First 15Gb/s Hybrid Memory Cube Interface

Xilinx, Inc. and Pico Computing, Inc. announced the first 15Gb/s Hybrid Memory Cube (HMC) interface for All Programmable UltraScale devices. The Xilinx UltraScale devices support the full HMC bandwidth of 4 lanes, comprised of 64 transceivers running up to 15Gb/s. Pico Computing's HMC controller IP yields exceptionally high memory bandwidth and outstanding performance/watt in a small but modular and highly scalable footprint. The combined solution enables engineers to begin 15Gb/s HMC designs for applications in domains such as high performance computing, packet processing, waveform processing, and image and video processing. Hybrid Memory Cube is a high performance memory solution that delivers unprecedented levels of bandwidth, power efficiency, and reliability. The HMCC has developed the HMC technology specification and continues to build the ecosystem to enable its widespread adoption. Pico Computing's HMC controller is highly parameterized to yield truly optimized system configurations to meet customers' specific design objectives. The number of HMC links addressed, the number and width of internal ports, clock speeds, power, performance, area, and other parameters can be "dialed in" to yield precisely the performance required. The Pico Computing HMC Controller IP is available now. About 20 nm UltraScale Family: Xilinx UltraScale devices deliver an ASIC-class advantage with the ASIC-class programmable architecture coupled with the ASIC-strength Vivado Design Suite and UltraFast Design Methodology. Based on TSMC's 20SoC process technology, UltraScale enables >2X realizable system performance and integration, and only consumes up to half the power relative to currently available solutions. These devices include next-generation interconnect, ASIC-like clocking, significant enhancements to the logic fabric, and 2nd generation, production proven 3D IC technology that eliminates system level bottlenecks and enables consistently high device utilization without performance degradation.

Xilinx, Inc. Announces Expansion of 20nm High-End Family to Enable Single Chip Implementation of 400G and 500G Applications

Xilinx Inc. announced the expansion of the 20nm high-end family to enable single chip implementation of 400G and 500G applications. The addition of VU190 FPGA to the Virtex UltraScale family, which combines nearly two million logic cells with over 130 Mb on-chip RAM, over a thousand parallel I/O pins, and up to 120 serial transceivers. The Virtex UltraScale ASIC-class family provides the industry's only programmable path to > 2X system level performance and integration with up to 50% power reduction, leveraging a combination of FPGA and production proven 3D IC technologies that provide customers an extra generation of value. The family is co-optimized with the Vivado(R) Design Suite and UltraFast(TM) design methodology for productivity, predictability and outstanding device utilization without performance degradation. The family incorporates 32.75 Gb/s transceivers for chip-to-chip, chip-to-optics, and 28G backplanes, and features multiple integrated ASIC-class 100G Ethernet and 150G Interlaken cores. Xilinx(R) SmartCORE(TM) and LogiCORE(TM) solutions provide proven IP cores that address a broad spectrum of functional building blocks for UltraScale designs. UltraScale 20nm devices also offer a seamless footprint migration to future UltraScale 16 nm FinFET based devices.

 

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Valuation XLNX Industry Range
Price/Earnings 22.0x
Price/Sales 5.4x
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Price/Cash Flow 20.2x
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